| 摘要 |
PROBLEM TO BE SOLVED: To increase topology and yield of memory array while reducing cost by fabricating first and second parts of a memory array, respectively, on the first and second planes of a substrate and then interconnecting respective memory arrays. SOLUTION: An memory array is a high density dynamic random access memory DRAM having memory cells at a tight pitch. A first part 110 including terminals, access channels, storage nodes, and the like, for each memory cell of a DRAM subarray is formed in a plurality of recesses on the first plane of a substrate 12 and a second part 150 of the DRAM is formed on the second plane of the substrate 12. A peripheral circuit device 152 is formed on the second plane of the subarray by appropriate process steps and an additional contact 154 is formed between the first and second parts of the subarray. According to the method, topology of the DRAM is increased. |
