发明名称 ANALOG SIGNAL PROCESSOR FOR DIGITAL CAMERA
摘要 PROBLEM TO BE SOLVED: To provide an analog signal processor for digital camera capable of proper black level clamping based on a digital video signal. SOLUTION: A CDS(correlated double sampling) circuit 100 which adjusts an electric signal from a CCD(charge coupled device) by a prescribed black level value to convert it into an analog video signal, an AGC circuit 200 which automatically controls the gain of the analog video signal from the CDS circuit 100, an A/D conversion part 300 which converts the analog video signal from the AGC circuit 200 to a digital video signal, and a black level clamping circuit 400 which uses first and second clock signals /Φ1 and /Φ2 from a timing signal generation part 700 and a black level clamping signal BLKCLP to clamp the black level value of the digital video signal from the A/D conversion part 300 and adjusts the prescribed black level value to feedback it to the CDS circuit 100 are included.
申请公布号 JP2000152032(A) 申请公布日期 2000.05.30
申请号 JP19990313637 申请日期 1999.11.04
申请人 HYUNDAI ELECTRONICS IND CO LTD 发明人 MIN-GYU KIM
分类号 H04N5/18;H04N5/16;H04N5/222;H04N5/335;H04N5/361;H04N5/378;(IPC1-7):H04N5/18 主分类号 H04N5/18
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