| 摘要 |
PROBLEM TO BE SOLVED: To provide a manufacturing method for forming a high-performance power GaAS MESFET with an improved yield while highly maintaining a gate/drain breakdown voltage. SOLUTION: A WSi film 71a is deposited on a GaAs substrate 70, and an Si ion is implanted using a mask 72, to form an active layer 74a. Then, by using a mask 73 with a narrow opening, a B ion is injected with a weak acceleration voltage to form a high-resistance layer 75 wide than a gate formation region. Further, by using a mask 78 with a narrower opening, an Mg ion is implanted to form a p-type region 90 in the high-resistance layer 75. A metal film 76 on a gate made of Au is formed at the opening of the mask 78 by the lift-off method, a WSi film 71a is subjected to patterning with the metal film 76 on the gate as a mask, and a gate electrode 71 made of WSi is formed right above the p-type region 90. An FET with a high degree of freedom for design can be obtained by arbitrarily changing the width and depth of an i-layer (the high-resistance layer 75). |
