| 摘要 |
PROBLEM TO BE SOLVED: To reduce the number of times of access to a memory, even when plural system data are inputted from DMA equipment while switched many times, when the data bus width of a memory is integral(two or more) times of the bus width of DMA equipment being a data outputting means. SOLUTION: This device is provided with a data buffer 2 provided corresponding to each D, P, and Q data system for storing and outputting two byte data, memory input and output means 4 for writing the two byte data outputted from the data buffer 2 in a memory 6, selecting means 3 for selectively inputting the output of one data buffer 2 among three to the memory input and output means 4, and control means 5 for inputting one byte data outputted out of sequential order from DMA equipment 1 to the corresponding data system data buffer 2, and for allowing the selecting means 3 to select the data buffer 2 at inputting of all the initial fraction data of the system, at the fulfilling all m bits, and at the time of inputting all the last fraction data of the system.
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