| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory which makes it possible to suppress the increase of the read time of a multivalued memory and realize a high speed read and the reduction of the write disturbance. SOLUTION: In reading, specified voltages are applied to word lines and source lines to set the voltage of the bit line BL according to the threshold voltage of a selected memory cell, the level change of a node ND0 is detected with a stepwise varying level type read signal VBLA3H applied to the gate of a high-withstand voltage transistor N1, thereby judging the voltage of the bit line BL. Since the voltage setting is once applied to a word line having a large time constant and the level-varying read voltage is applied to the gate of the transistor N1 having a small time constant, the read can be speeded up. In writing, a higher voltage than a power voltage can be applied to the bit line, thereby reducing the write disturbance.</p> |
