INTEGRATED CIRCUIT AND TIMING ADJUSTING METHOD

摘要

PROBLEM TO BE SOLVED: To obtain an integrated circuit which operates in target timing on the whole without changing the arrangement in the integrated circuit. SOLUTION: A flip-flop circuit block 101 of fixed size is composed of a flip-flop 104 and a timing adjusting circuit 103 arranged in the clock signal input path of the flip-flop 104 and the distance L1 from an input terminal 102 to the timing adjusting circuit 103 and the distance L2 from the timing adjusting circuit 103 to the flip-flop 104 are held constant. A flip-flop circuit block which does not include the timing adjusting circuit 103 has the same size with that of the flip-flop circuit block 101 and the position of the flip-flop 104 and the length of a signal line, i.e., propagation delay characteristics, etc., of a clock signal are made fixed in the arrangement wherein both the block including the circuit 103 and the block not including the circuit 103 are mutually replaced.