| 摘要 |
PURPOSE: An output buffer circuit is to shorten the delay time for a change of a digital output signal relative to a change of a digital input signal and to allow switching with higher speed. CONSTITUTION: An output buffer circuit comprises: a pair of a first p channel MOSFET(Metal Oxide Semiconductor Field Effect Transistor) and a first n channel MOSFET arranged at an output end from which an output signal is derived; a first clamp circuit(1) for clamping a gate voltage of the first p channel MOSFET at a first clamp level for a first predetermined period, to increase the ascending rate of the output signal; and a second clamp circuit(2) for clamping a gate voltage of the first n channel MOSFET at a second clamp level for a second predetermined period, to increase the descending rate of the output signal. A fist resistor(R11) is connected to the first clamp circuit for retarding the current flowing there through, and a second resistor(R21) is connected to the second clamp circuit for retarding the current flowing there through. A first capacitor(Cp) is connected to the first clamp circuit for controlling the gate voltage of the first p channel MOSFET through charging and discharging operation. Further, a second capacitor(Cn) is connected to the second clamp circuit for controlling the gate voltage of the first n channel MOSFET through charging and discharging operation.
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