| 摘要 |
PURPOSE: A semiconductor memory device is to include a wiring layer of thin thickness by using both a conductive layer of a contact portion and a conductive layer of a first layer. CONSTITUTION: An active region is formed in an N-well(14N) in such a manner that one side of the active region is formed with a first load transistor(Q1) and the other side of the active region is formed with a second load transistor(Q2). Two divided common active regions are formed in a P-well(14P). A first driving transistor(Q3) and a first transferring transistor(Q5) are formed in one common active region, and a second driving transistor(Q2) and a second transferring transistor(Q6) are formed in the other common active region. Portions intersected with gate electrode layers and the active region forms gate electrodes, respectively. A polysilicon wiring layer(50) connects with a first gate electrode layer(40) and a drain region of the second driving transistor. A second gate electrode(60) be connected to a gate electrode of the second driving transistor, a gate electrode of the second load transistor, and a drain region of the first load transistor.
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