发明名称 |
COMBINER |
摘要 |
Circuit for combining a plurality of digital communication channels in a telecommunication system with reduced hardware requirements. The circuit allows to accumulate samples of the input communication channels in a regist er using an adder. The bit width of the connection lines between the register a nd the adder may be selected considering the bit width and number of input communication channels, such that minimal bit widths are provided. |
申请公布号 |
CA2351623(A1) |
申请公布日期 |
2000.05.25 |
申请号 |
CA19992351623 |
申请日期 |
1999.11.10 |
申请人 |
TELEFONAKTIEBOLAGET LM ERICSSON |
发明人 |
KUKLA, RALF;NOURBAKHSH, SEYED-HAMI;NIEGEL, MICHAEL |
分类号 |
H04J13/00;(IPC1-7):H04J13/00 |
主分类号 |
H04J13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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