| 摘要 |
<p>The present invention provides round-robin arbitration between requests for access to a shared resource such as a data bus (7), shared by a plurality of hardware modules. A central counter (1) provides a count state bus (3) with cyclically altered count states. In each hardware module the count state on the bus (3) is compared (4) with a count state associated with the hardware module. The output from the comparator is used to enable the transmission of a request signal R to the central counter and the transmission of a grant signal Gi to the hardware module. The request signal R disables the clock signal C to the counter (1) and the grant signal Gi grants access to the shared resource (7) from the hardware module. When the hardware module terminates its access to the resource (7) it deactivates the request signal R and the counter resumes cyclical counting. Hereby a simple arbitration of round-robin type is provided using simple logic gates and a counter.</p> |
