| 摘要 |
PURPOSE: A process to change electric charges on the floating gate of multiple stacked memory devices in NOR array is provided for a process that programs and erases the stacked gate devices in the NOR array, and that verifies the electric charges on the float gate of individual device in the NOR array when the device is programmed or erased. CONSTITUTION: A NOR array(100) comprises a couple of columns(110,120) and a couple of rows(130,140). Each of the columns(110,120) has each of the associated bit lines(150,160) respectively. Each of the rows(130,140) has each of the associated word lines(170,180). Devices in the array(100) have individual codes(181-184). The drains of the individual devices(181-184) are connected to the bit line for specific devices. The gates of the individual devices(181-184) are connected to the drain lines for specific devices. The devices(181-184) comprise common VB and VS.
|
