发明名称 |
Schaltungsanordnung zur Umsetzung eines monopolaren Eingangssignales in ein bipolares Ausgangssignal |
摘要 |
The circuit for converting unipolar input to bipolar output includes a differential amplifier, first and second feedback resistors; and a peak detector. The negative output of the differential amplifier is fed back to the positive input of the differential amplifier through the first feed-back resistor, and the positive output of the differential amplifier is fed back to the negative input of the differential amplifier through the peak detector and the second feedback resistor. A pole of lowest frequency among feedback amplifier circuits forming the circuit for converting unipolar input to bipolar output is to be determined with cut-off frequency of an amplification stage of the differential amplifier. <IMAGE> |
申请公布号 |
DE69423987(D1) |
申请公布日期 |
2000.05.25 |
申请号 |
DE1994623987 |
申请日期 |
1994.01.06 |
申请人 |
NEC CORP., TOKIO/TOKYO |
发明人 |
NAGAHORI, TAKESHI;OAMI, TOSHIMASA;ANZAI, NORIKO |
分类号 |
G01R19/04;H03F3/45;H04B10/148;H04B10/158;H04L25/06;(IPC1-7):H04L25/06 |
主分类号 |
G01R19/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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