摘要 |
<p>PURPOSE: A delay circuit is to reduce the change of delayed time according to the change of the manufacturing processes. CONSTITUTION: A delay circuit comprises a first p-channel FET(Field Effect Transistor)(12a) and a first n-channel FET(12b), both being connected in the mutual supplemental basis, and either one of the first p-channel FET and the first n-channel FET comprising a first delay inverter(12) having an extended gate length, a second p-channel FET(13a) and a second n-channel FET(13b), both being connected in the mutual supplemental basis and either one of the second p-channel FET and the second n-channel FET comprising a second delay inverter(13), a NAND gate(11) having a first input receiving an input signal and a second input receiving the output signal of the second delay inverter, and an inverter(14) outputting to invert the output signal from the NAND gate.</p> |