发明名称 Pipelineverarbeitungsmaschine
摘要 An address pipeline includes a sequence of registers for storing the memory addresses of instructions currently being processed within the different stages of an execution pipeline. In parallel with the execution pipeline, the address pipeline advances the corresponding memory addresses as the instructions are advanced through the execution pipeline. Address pipelining allows the programmer of a pipelined processor to understand the otherwise hidden operation of a pipelined processor by giving the programmer means to track instructions through the pipeline. In addition, the address pipeline includes an instruction status register for indicating whether an instruction at any given stage of the pipeline has been executed and a program counter address breakpoint register for storing the address of the instruction that actually triggers a breakpoint.
申请公布号 DE19824289(C2) 申请公布日期 2000.05.25
申请号 DE1998124289 申请日期 1998.05.29
申请人 NATIONAL SEMICONDUCTOR CORP., SANTA CLARA 发明人 PORTEN, JOSHUA;BAR-NIV, AMIR
分类号 G06F9/38;G06F11/00;G06F11/34;(IPC1-7):G06F9/38 主分类号 G06F9/38
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