| 摘要 |
A method and apparatus to estimate properties of an integrated circuit device utilizes reduced resources. The representation of an integrated circuit is sampled using the statistical techniques of survey sampling. An average value of a property is determined from these samples and used to determine the property of the integrated circuit as a whole. Thus a property of an integrated circuit is determined from an analysis of a fraction of the integrated circuit representation. Error bounds associated with the property can be optionally determined from the estimated variance of the sampled property measurements. The method is realized using a general purpose computer. The invention has application to the estimation of integrated circuit manufacturability, yield and other properties. |
