Rotation register for orthogonal data transformation

摘要

A data processing apparatus (71) includes a data processor bus (103), the rotation register (208) and a register selection circuit. The rotation register (208) is embodied by a plurality of data registers (200) each having a plurality of equal bit groups. The number of bits within each bit group of each data register preferably equals the number N of data registers. The register selection circuit permits normal register reads and writes via the data processor bus. The register selection circuit permits special rotational data accesses. In a rotation read mode the register selection circuit selects noncontiguous bits from a predetermined position within each sections for each of the data registers for read access. In a rotation write mode the register selection circuit selects noncontiguous bits from a predetermined position within each sections for each of the data registers for write access. The data registers (200) are connected together in a loop (208). The most significant bit of each data register connected to the least significant bit of a sequential data register, with the last data register is connected to the first data register. In a register rotation mode the register selection circuit rotates bits in each data register in around the loop. This rotation is preferably by one bit upon each execution of a register rotation instruction.