Test pattern generator for testing electrical characteristics of electrical device; uses read control and transfer control to extract test pattern from master memory and enter it in cache memory

摘要

The test pattern generator has a master memory (32) for storing the test pattern, a master cache memory for storing the test pattern read from the master memory, a vector memory for holding a vector command indicating the test pattern sequence, a read control and a transfer control (34), for transfer of the test pattern read from the master memory to the master cache memory, if the address of a flaw is to be transferred. Independent claims are also included for the following; (a) an electrical testing device; (b) a test pattern generation method; (c) a cache memory device