| 摘要 |
<p>PROBLEM TO BE SOLVED: To suppress the load capacity of the output terminal of a memory cell and to connect a number of memory cells by dividing a reading dedicated line in the midway, entering a trystate buffer therein, suppressing a capacity load to be driven by the output terminal of the memory cell, amplifying a signal by the buffer, and driving a next reading dedicated line. SOLUTION: When an active memory cell 3.1 becomes active and a signal is outputted from the data output terminal 3.2 of the active memory cell 3.1, the potential of a reading dedicated line 1:3.3 becomes high or low according to the signal. In this case, the other memory cells and a trystate buffer 1:3.5 are in a high impedance state. A trystate buffer 3.6 receiving a signal from the reading dedicated line 1:3.3 drives a reading dedicated line 2:3.4, outputs data, and a trystate buffer 3:3.7 receiving the signal of the reading dedicated line 2:3.4 transmits the signal to an output destination.</p> |
