发明名称 ATM REPEATER AND ITS ATM SWITCH UNIT
摘要 PROBLEM TO BE SOLVED: To attain high speed and high efficiency for hop by hop transfer by enhancing a throughput of the hop by hop transfer between an asynchronous transmission mode ATM switch unit and an IP processing unit. SOLUTION: An ATM switch unit 20 is provided with an ATM disassembly/ assembly circuit 13a, which reconfigures an ATM cell requiring hop by hop transfer into an IP packet. The IP packet is transferred to an IP processing unit 10, which retrieves a transfer destination. Furthermore, the IP packet whose transfer destination is retrieved by the IP processing unit 10 is transferred to the ATM switch unit 20 in only a form that Tag information is added to the IP packet, this IP packet is given to the ATM disassembly/assembly circuit 13a, where the IP packet is disassembled into an ATM cell, a virtual channel VC value is acquired based on the Tag information and the disassembled ATM cell is transmitted to a downstream channel from an output port corresponding to the VC value.
申请公布号 JP2000138683(A) 申请公布日期 2000.05.16
申请号 JP19980310691 申请日期 1998.10.30
申请人 TOSHIBA CORP 发明人 IKEDA KATSUHIKO
分类号 H04Q3/00;H04L12/28;H04L12/701;H04L12/931;H04L12/935;H04L12/951;(IPC1-7):H04L12/28;H04L12/56 主分类号 H04Q3/00
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