发明名称 SHADING ARITHMETIC UNIT AND IMAGE PROCESSOR USING THE ARITHMETIC UNIT
摘要 PROBLEM TO BE SOLVED: To fast process the shading of a three-dimensional CG in a simple hardware constitution. SOLUTION: The 2n-multiplied incident light intensity (an integer), a 2n-multiplied reflection coefficient (an integer) and a direction coefficient (a number with a fixed point) are held in the registers R1-R3 respectively. Then the product of output value of the registers R1-R3 is calculated by a multiplication circuit 21 and held in a register R4. These three numbers on environmental beams, diffused reflection beams and mirror reflection beams are successively held in the registers R1-R3 respectively. It's regarded that the reflection coefficient of the environmental beams is 1.0. An addition circuit 22 calculates the sum of output of the registers R4 and R5. The register R4 holds the output value of the circuit 22 by the 1st and 2nd calculation results of the circuit 21, and the register R5 is cleared to zero by the 3rd calculation result of the circuit 21. At the same time, the output value of the circuit 22 is held in a register R6 as the reflected light intensity value. The register R5 is cleared at the 3rd reflected light intensity calculation preceding by one step at the 1st holding of the output value of the circuit 22. Each of registers R1-R6 has n bits and the circuit 21 calculates only the significant n bits of its product.
申请公布号 JP2000137828(A) 申请公布日期 2000.05.16
申请号 JP19980309740 申请日期 1998.10.30
申请人 FUJITSU LTD 发明人 ENDO YOICHI;NAKAHARA MAKOTO;MIURA EISUKE
分类号 G06T15/80;(IPC1-7):G06T15/50 主分类号 G06T15/80
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