发明名称 Clock supply apparatus reducing consumption of power
摘要 A clock supply apparatus includes a low-rate source clock generating unit for generating a low-rate source clock signal, a frequency multiplication/division unit for performing frequency multiplication/division processing for the low-rate source clock signal to generate a high-rate clock signal to be utilized in signal processing only during a period in which a sleep signal remains nonactive, a sleep time measuring unit for measuring a sleep time duration from the moment the sleep signal becomes active and issuing a sleep end signal upon measurement of a predetermined time period, and a sleep control unit for controlling whether the signal processing block is placed in a sleep or non-sleep mode. The sleep control unit decides the end of the sleep period upon detection of the sleep end signal.
申请公布号 US6064252(A) 申请公布日期 2000.05.16
申请号 US19980060302 申请日期 1998.04.15
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 NARA, YOSHIKAZU
分类号 G06F1/04;G06F1/32;(IPC1-7):G05F3/02 主分类号 G06F1/04
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