| 摘要 |
PROBLEM TO BE SOLVED: To provide an interface bus provided with the inner data bus of high usability by providing a first buffer memory which temporarily stores a control value taken into a data input art between the data input part and an output register. SOLUTION: At an operation mode, the input sides of output registers 2-5 are connected to buffer registers 12-15 through multiplexers 8-11. The buffer registers 12-15 as first buffer memories temporarily store new control values before they are written into the output registers 2-5. The input sides of the multiplexers 8-11 are switched to the outputs of the buffer registers 12-15 by a control line 7. A micro processor system 6 writes the new control values into the buffer registers 12-15. Thus, the micro processor system 6 is connected to an interface module 1 through a data bus 16 as a data input part, an address bus 17 and the control line.
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