发明名称 PRESCALER
摘要 PROBLEM TO BE SOLVED: To provide a prescaler which can prevent malfunctions by generating the optimum select signal. SOLUTION: A prescaler 8 is provided with a selection circuit 13, a 1/N frequency divider 14, a selection control circuit 15, and a synchronous circuit 16. The selection circuit 13 selects either one of a complementary signal composed of a positive-phase signal (a) or a complementary signal composed of an anti-phase signal (b) in accordance with a select signal S and outputs the selected signal (c). The frequency divider 14 divides the frequency of the selected signal (c) by N. The control circuit 15 outputs the signal (g) obtained by dividing the frequency of the output signal XPout of the frequency divider 14. The synchronous circuit 16 outputs the output signal (g) of the control circuit 15 as the select signal S synchronously to the complementary signals (a) and (b).
申请公布号 JP2000138580(A) 申请公布日期 2000.05.16
申请号 JP19980312435 申请日期 1998.11.02
申请人 FUJITSU LTD;FUJITSU VLSI LTD 发明人 HASEGAWA MORIHITO
分类号 H03K23/64;H03L7/197;(IPC1-7):H03K23/64 主分类号 H03K23/64
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