发明名称 Manufacturing method of semiconductor memory device having a trench gate electrode
摘要 A manufacturing method provides a semiconductor device having a trench gate type transistor and a planer type transistor gate electrodes are formed certainly and without increasing the number of photolithography steps. After formation of a gate insulating film, a polysilicon film, and a WSi film for a transistor in a peripheral circuit section, an oxide film is formed on the entire surface of the resultant structure. Subsequently, the oxide film in a trench formation region is selectively removed in a memory cell array section and the oxide film other than a gate electrode formation region is selectively removed in the peripheral circuit section. A silicon substrate is etched using the remaining oxide film as a mask to form a trench in the memory cell array section, and the polysilicon film and the WSi film are etched to form the gate electrode in the peripheral circuit section. Thereafter, a gate insulating film and a gate electrode for a cell transistor are formed in the trench of the memory cell array section.
申请公布号 US6063669(A) 申请公布日期 2000.05.16
申请号 US19970805273 申请日期 1997.02.25
申请人 NEC CORPORATION 发明人 TAKAISHI, YOSHIHIRO
分类号 H01L21/8239;H01L21/8242;H01L27/108;(IPC1-7):H01L21/336;H01L21/824 主分类号 H01L21/8239
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