发明名称 STACK CHIP PACKAGE
摘要 PURPOSE: A stacked chip package is to enable high density mounting by arranging many packages vertically and in parallel with each other and to secure a stable signal transmission path between a chip and the exterior. CONSTITUTION: A case body(30) has the first recess(31) at its bottom surface and a sidewall(33) connected vertically to the bottom surface. A through hole(34) is formed on the first recess. The first conductive lead wire(32) is formed on the sidewall to be extended from a top surface to a bottom surface. A case cover(20) covers the case body to encapsulate from exterior and includes the second recess(21) at a position opposite to the first recess. The second lead wire(22) is provided on the case cover. A chip package comprises a semiconductor chip including a bonding pad and a bump, and a metal pattern surrounding both ends of the chip. The metal pattern is insulated from its adjacent metal pattern. An insulating adhesive element is inserted and attached to the space between the metal pattern and the chip. The third lead wire is formed in the through hole of the case body and connected to the metal pattern of the chip package inserted into the through hole.
申请公布号 KR100256307(B1) 申请公布日期 2000.05.15
申请号 KR19970075220 申请日期 1997.12.27
申请人 HYUNDAI ELECTRONICS IND. CO.,LTD. 发明人 SON, WON JUN
分类号 H01L23/28;(IPC1-7):H01L23/28 主分类号 H01L23/28
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