发明名称 Method and arrangement for correcting phase error in linearization loop of poweramplifier
摘要 A method and arrangement for correcting a phase error in a linearization loop of a power amplifier, the loop comprising an I/Q modulator (10), one or more delay-causing power amplifiers (13) to be linearized, an I/Q demodulator (11) for generating I and Q feedback signals from the output signals of the amplifier (13), difference means (20, 21) of the I and Q branches for generating I and Q difference signals from the I and Q feedback signals and the I and Q input signals, the I/Q modulator and the I/Q demodulator receiving an oscillator frequency from the same local oscillator (14), and a phase shifter (17), the method comprising determination of a phase error resulting from the delay produced in the linearization loop, which determination comprises feeding excitation signals to the I and Q inputs (I IN, Q_IN) of the linearization loop, measuring the signals resulting from the excitation signals and calculating a phase error by means of the measured signals and excitation signals, and correcting the phase error by adjusting a phase of a local oscillator signal passing to the I/Q modulator or I/Q demodulator by means of a phase shifter (17), whereby on determining the phase error the signals resulting from the excitation signals are measured from the I and Q difference signals or the I and Q input signals of the I/Q modulator (10) and the phase determination is performed while the linearization loop is closed.
申请公布号 AU1048400(A) 申请公布日期 2000.05.15
申请号 AU20000010484 申请日期 1999.10.22
申请人 NOKIA NETWORKS OY 发明人 NIKLAS LAGERBLOM;KRISTIAN THOMASSON
分类号 H03D7/16;H03F1/32 主分类号 H03D7/16
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