发明名称 METHOD FOR EVALUATING A GATE SIZE OF A SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method is provided to reduce the consumption of time and man power for evaluating a gate size by measuring the gate size with ease through a grasp of a gate position to be measured. CONSTITUTION: An evaluation-purposed gate is formed under the consideration of an arrangement environment for each device formation area to have on a peripheral region of a device formation region of a semiconductor wafer. A measurement of the formed evaluation-purposed gate size is measured to calculate a difference of the evaluation -purposed size and a designed gate size. The size difference between the actually manufactured evaluation-purposed gate and the designed gate. The evaluation gate is formed together with a gate formed on the device formation region at the same time.
申请公布号 KR20000026676(A) 申请公布日期 2000.05.15
申请号 KR19980044323 申请日期 1998.10.22
申请人 HYUNDAI MICRO ELECTRONICS CO., LTD. 发明人 PARK, HYUN
分类号 H01L21/66;(IPC1-7):H01L21/66 主分类号 H01L21/66
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