| 摘要 |
PURPOSE: A comparator is provided to reduce devices by using a logic circuit instead of adder, so that high integration can be performed. CONSTITUTION: A comparator comprises plural 1st comparison portions, plural 2nd comparison portions, a negative OR gate and a P-MOS transistor. The 1st comparison portions outputs C(m+1) bit as a result of Am < Bm comparison. Here, Am, Bm and Cm are m-th bits of binary digits A, B and C. The 2nd comparison portions compares Am and Bm whether they are same or not. The negative OR gate performs negative OR operation to inputs of the result of each 1st and 2nd comparison portions, and outputs the result as that of A > B. Gate of the P-MOS transistor is grounded, Source of the P-MOS transistor is connected to a power source voltage, and Drain of the P-MOS transistor is connected to output of the 2nd comparison portions.
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