METHOD FOR MANUFACTURING FLASH MEMORY CELLS

摘要

PURPOSE: A stacked gate flash memory cell is provided to improve a step coverage of a common source line and a mis align margin by using a nitride spacer without a field oxide formation process. CONSTITUTION: A first ion implantation is performed on a semiconductor substrate(30)defined by an isolating region(31) and an active region. A nitride spacer(34) is formed at both sides of the isolating region(31). A tunnel oxide(35) is formed only on the active region of the semiconductor substrate(30). A floating gate(36) is formed by patterning a first polysilicon and a dielectric layer(37) of O(oxide)-N(nitride)-O(oxide) structure. A control gate(33) is formed by etching a second polysilicon. Then, a second ion implantation is performed on the resultant structure to form a junction region and a common source line.