TIMER PROCESSOR IN AN ATM SIGNAL CONTROL SYSTEM

摘要

PURPOSE: A timer processor of an ATM signal control system is provided to provide an exact time slice by using an interrupt generated at a hardware instead of waiting a clock tick. CONSTITUTION: A timer processor of an ATM signal control system comprises a main controller (11) which receives a timer requested from a different task to diverge from the timer to a corresponding process routine. The main controller(11) is supplied with a time slice for a que polling from a time slice generator(12), and calls a completion detector(15) by the time slice. The time slice generator(12) receives a time interrupt from a real-time hardware to generate the time slice. A timer requesting part(13) constructs a timer set message or a timer release message when a timer request exists from other task, and transfers the message to the main controller(11). A que adding part(14) adds a new timer set request to a que according to a control of the main controller(11). The completion detector(15) detects the que, and sets a completed timer as a completion. A completion processing part(16) releases a requested timer when completion information is transferred from the completion detector(15) or when a release of the timer is requested.