METHOD FOR MANUFACTURING A SHALLOW TRENCH FOR A SEMICONDUCTOR DEVICE ISOLATION

摘要

PURPOSE: A method is provided to prevent a deterioration of a gate oxide due to an electric field concentration on trench side wall edges by forming a complete corner rounding of shallow trench side wall edges. CONSTITUTION: A pad oxide and a nitride are consecutively formed on the upper of a silicon wafer (11) to form a pattern defining an isolation region, and the silicon wafer(11) is etched to form a shallow trench. The silicon wafer(11) is thermal-oxidized to form a liner oxide(14) on the internal walls of the shallow trench. A thick oxide is deposited on the front side of the silicon wafer(11) to bury the shallow trench with an oxide(15). The nitride and the pad oxide are removed. The liner oxide(14) is formed due to a rapid thermal oxidation process after a nitrogen ion injection into the internal walls of the shallow trench.