| 摘要 |
PURPOSE: A D flip-flop having a miniaturized composition is provided to reduce the size of cells and the size of chips. CONSTITUTION: A D flip-flop circuit comprises a first inverter, a second inverter, a reverse circuit, a third inverter, a first transmission gate, a first logic circuit, a second logic circuit, a second transmission gate, a fourth inverter, a fifth inverter, and a sixth inverter. The first inverter reverses a clock signal. The second inverter reverses the reversed clock signal. The reverse circuit is controlled by the clock signal reversed via the first and the second inverter, and reverses an input signal. The third inverter reverses the reversed input signal. The first transmission gate is controlled by the clock signal reversed through the first/the second inverter, and transfers the input signal reversed via the third inverter. The first logic circuit is controlled by the clock signal reversed via the first and second inverter, and operates the input signal and a reset signal in NAND. The second logic circuit operates the input signal in NAND transferred through the reset signal and the first transmission gate inverter. The second transmission gate is controlled by the reversed clock signal through the first and the second inverter, and transfers the input signal transferred through the first transmission gate. The fourth inverter reverses an output of the second logic circuit. The fifth inverter reverses an output of the second transmission gate. The sixth inverter has an input terminal connected to current paths, which are formed between the input of the fourth inverter and the output of the second logic circuit, and an output terminal connected to current paths, which are formed between the output terminal of the second transmission gate and the input of the fifth inverter.
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