发明名称 FERROELECTRIC RANDOM ACCESS MEMORY
摘要 PURPOSE: An FeRAM(Ferroelectric Random Access Memory) is provided to reduce areas of a dummy cell by obtaining reference voltage necessary for sensing cell data through a reference voltage generator, to reduce time because it is unnecessary to equalize by reading '0' and '1' from the dummy cell, and to prevent reduction of life span of a chip caused by a fatigue of the dummy cell. CONSTITUTION: An FeRAM(Ferroelectric Random Access Memory) comprises a memory cell(130), a sense amplifier(120), a bit line pull-down unit(110), a reference voltage generator(250), and a reference voltage delivering unit(140). The memory cell has a transistor in which a drain is connected to a first bit line and a word line is connected to a gate, and has a ferroelectric capacitor connected between a source of the transistor and a plate line. The sense amplifier amplifies a voltage difference between the first bit line and a second bit line which is a reference voltage line. The bit line pull-down unit pulls down the first bit line and the second bit line to ground power supply voltage by responding to a first control signal. The reference voltage generator generates reference voltage corresponding to an intermediate level of data '0' and '1', by using threshold voltage values of MOS(Metal Oxide Semiconductor) transistors. The reference voltage delivering unit delivers the reference voltage from the reference voltage generator to the second bit line by responding to a third control signal.
申请公布号 KR20000027380(A) 申请公布日期 2000.05.15
申请号 KR19980045296 申请日期 1998.10.28
申请人 HYUNDAI ELECTRONICS IND. CO., LTD. 发明人 RYU, JI HWAN;KANG, WOO SUN
分类号 H01L29/788;(IPC1-7):H01L29/788 主分类号 H01L29/788
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