发明名称 INTER-PROCESSOR COMMUNICATION CONTROLLER
摘要 PROBLEM TO BE SOLVED: To facilitate the change of a system constitution and also to make significantly improvable the flexibility of an inter-processor communication controller by providing a buffer which receives the inter-processor communication requests and stores them and a communication destination port number generation circuit which generates the communication destination port numbers based on each communication destination device number. SOLUTION: The inter-processor communication controller 40 receives the inter-processor communication requests from a crossbar switch 20 and stores these requests in a buffer 50 in the receiving order of them. A buffer control circuit 60 reads an inter-processor communication requests out of the buffer 50. The communication destination device type and number included in the read communication request are sent to a communication destination port number generation circuit 70 where a communication destination port number is generated. This port number is added to the inter-processor communication request and sent to the switch 20. Thus, it is possible to deal with the change of the positions or the number of processors just by changing the contents of a port number rereading register.
申请公布号 JP2000132527(A) 申请公布日期 2000.05.12
申请号 JP19980322821 申请日期 1998.10.27
申请人 NEC ENG LTD 发明人 HIRAOKA TOSHIYA
分类号 G06F15/173;G06F15/177 主分类号 G06F15/173
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