| 摘要 |
PROBLEM TO BE SOLVED: To provide a data transfer controller and electronic equipment capable of reducing the overheads of processings and transferring data at high speed with the hardware of a small scale. SOLUTION: Relating to this data transfer controller of IEEE1394, a packet shaping circuit 160 shapes packets transferred from respective nodes so as to be used by an upper layer and a packet separation circuit 180 writes the headers of the shaped packets in the header area of a RAM and writes the data in a data area. Then, at the time of packet shaping, a data pointer delivered from the packet separation circuit 180 is added to the header of the packet. The packet is separated by using TAG. Broadcast information, error status information and information for indicating whether or not it is the packet received in a self ID period are added to the trailer of the packet at the time of packet shaping. The information of ACK or the like time sequentially added to the rear side of the packet in packet shaping is written to the head side of the header of the packet in the RAM 80.
|
