ELECTRONIC DEVICE AND MANUFACTURE THEREOF INCLUDING NONVOLATILE MEMORY CELL SUBJECTED TO NON-SALICIDE PROCESSING, HIGH-VOLTAGE TRANSISTOR SUBJECTED THERETO, AND JUNCTION LOW-VOLTAGE TRANSISTOR SUBJECTED TO SALICIDE PROCESSING

摘要

PROBLEM TO BE SOLVED: To enable integration of all together a nonvolatile memory cell and a high- speed transistor subjected to salicide processing, by forming firstly the region to form a high-voltage transistor, and by forming thereafter the region to form a low-voltage transistor. SOLUTION: Into a sacrificial oxide layer 10 present on a substrate 2, N-type ionized dopants are injected using a mask for forming an H-HV region of a high-voltage(HV) PMOS transistor. Then, after masking the entire surface of a wafer 1 while leaving an HV active region and an array active region, P-type ionized dopants are injected thereinto to form a P-HV region 13 of an HV transistor and form a P-matrix region 14 of a memory cell. Subsequently, N-type ionized dopants are injected into the layer 10, using a mask to form an N-LV region of a low-voltage(LV) PMOS transistor. Continuously, after masking the entire surface of the wafer 1, leaving an LV active region, P-type ionized dopants 18 are injected thereinto to form P-LV region 19 of an L V-NMOS transistor.