| 摘要 |
<p>A computer system employs DRAM devices (DEVICE1-DEVICE12) in a memory sub-system, which devices (DEVICE1-DEVICE12) are assigned into particular pools corresponding to different power consumption states with a most-recently-accessed (MRA) device being assigned to an active pool (20) and placed at the top of a stack structure. A LRA device in the active pool (20) is evicted from the active pool (20) and placed in standby pool (21) when the active pool (20) is full and the processor accesses another device, which is not currently assigned to the active pool (20). A LRA device of the standby pool (21) gets evicted into a nap pool (22) upon one of two conditions: either a timeout occurs, or the standby and active pools (20 and 21) are full and the processor accesses another device, which is not currently assigned to either the active or standby pools (20 or 21).</p> |
