| 摘要 |
A fuse structure (100) for semiconductor memories includes a gate structure (106) including a polysilicon fuse (108) and a gate cap layer (122) disposed above the polysilicon fuse (108). An interlevel dielectric layer (128) is deposited on the gate structure (106), and a dielectric layer (130) is deposited on the interlevel dielectric layer (128). The dielectric layer (130), the interlevel dielectric layer (128) and the gate cap layer (122) have at least one opening (132,134) formed therein for removing a portion of the gate cap layer (122) over the polysilicon fuse (108). A method of fabricating a fuse for a semiconductor memory, in accordance with the invention, includes the steps of forming a gate structure (106) on a substrate including a polysilicon fuse layer (108) and a gate cap layer (122) disposed above the polysilicon fuse layer (108), forming an interlevel dielectric layer (128) over the gate structure (106), depositing a dielectric layer (130) over the interlevel dielectric layer (128), the dielectric layer and the interlevel dielectric layer both including a material which is selectively etchable relative to the gate cap layer (122) and selectively etching contact holes (132,134) through the dielectric layer and the interlevel dielectric layer such that at least one contact hole is formed over the gate structure and extends into the gate cap layer (122). <IMAGE> |
