| 摘要 |
External terminals (6) are electrically connected to a semiconductor chip (2) via a polyimide tape (4) having a conductive layer (4b) sandwiched between polyimide layers (4a, 4c). The external terminals (6) are electrically connected to the conductive layer (4b) provided on one surface thereof. Pads (2a) of the semiconductor chip (2) and the conductive layer (4b) are connected by solder (10) on the other surface thereof. A resin (12) is filled in the entire area in an interval between the facing semiconductor chip (2) and polyimide tape (4) including the periphery of the connection portions. The invention reduces the manufacturing cost by reducing the material cost and the number of manufacturing steps in a CSP (chip size packaging) technology using a polyimide tape for an intermediate substrate for providing an external terminal and prevents mechanical shock from being applied to a semiconductor chip as much as possible. <IMAGE> |
