Hardware-optimized reed-solomon decoder for large data blocks

摘要

An error computation processor for use in a Reed Solomon decoder for computing the error locations and magnitudes of a large data block having a maximum of t errors over a desired Galois field. The processor can compute the error-locator polynomial, the error-evaluator polynomial, and the values of the errors whose location was determined to be in error with only two polynomial storage registers, two element storage registers, one multiplier for performing selected multiplication and division, one adder for performing selected addition and subtraction, one error locator stack, one error value stack, and a syndrome register for storing the syndromes of the large data block.