Compound domino logic circuit including an output driver section with a latch

摘要

An improved compound domino logic circuit is provided. The compound domino logic circuit includes a dynamic logic section and an output driver section. The dynamic logic section includes a clock source providing a clock signal defining an evaluate mode during each high clock cycle and a precharge mode during each low clock cycle. The dynamic logic section includes at least two input nodes for receiving at least two input signals during each evaluate mode. The dynamic logic section includes an output driver input node providing an dynamic output signal during each evaluate mode. The output driver section receives the dynamic output signal and provides an output signal. The output driver section includes a latch for maintaining the output signal during a next precharge mode of the dynamic logic section. A clocked field effect transistor coupled to the output driver input node isolates the dynamic logic section from the output driver section. The output driver section includes a first inverter and a second inverter connected in series to provide the output signal at the output of the second inverter. The output driver section latch is provided by a tristate feedback device connected across the first inverter. The tristate feedback device is enabled only during the precharge mode of the dynamic logic section.