发明名称 |
On-chip-generated supply voltage regulator with power-up mode |
摘要 |
A regulator system for an on-chip-generated supply voltage includes a voltage detection circuit, a power-up mode detection circuit, a normal mode detection path, and a power-up detection path. The voltage detection circuit monitors the on-chip-generated supply voltage and generates a signal that indicates the level of this supply voltage. The power-up mode detection circuit detects when the chip is in the power-up mode and generates a path select signal. The path select signal causes the regulator system to select the power-up detection path during the power-up mode and to select the normal detection path when not in the power-up mode. The power-up detection path includes voltage regulation circuitry that does not rely on a reference voltage. In one embodiment, the power-up detection path includes a logic gate coupled to receive the signal from the voltage detector. The logic gate is skewed to have a trip point that corresponds to voltage level slightly greater than that of the external supply voltage. The logic gate controls the on-chip voltage generator to maintain the on-chip-generated voltage level at a magnitude greater than that of the external supply voltage. During power-up, the power-up detection circuit selects the power-up detection path, thereby avoiding the need to disable the on-chip voltage generator as in conventional systems that depend on a reference voltage. |
申请公布号 |
US6060873(A) |
申请公布日期 |
2000.05.09 |
申请号 |
US19990266006 |
申请日期 |
1999.03.12 |
申请人 |
VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION |
发明人 |
TERNULLO, JR., LUIGI;STEPHENS, JR., MICHAEL C.;EARL, JEFFREY S. |
分类号 |
G05F3/16;(IPC1-7):G05F3/16 |
主分类号 |
G05F3/16 |
代理机构 |
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地址 |
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