发明名称 |
Non-inclusive cache method using pipelined snoop bus |
摘要 |
A non-inclusive cache system includes an external cache and a plurality of on-chip caches each having a set of tags associated therewith, with at least one of the on-chip caches including data which is absent from the external cache. A pipelined snoop bus is ported to each of the set of tags of the plurality of on-chip caches and transmits a snoop address to the plurality of on-chip caches. A system interface unit is responsive to a received snoop request to scan the external cache and to apply the snoop address of the snoop request to the pipelined snoop bus. A plurality of response signal lines respectively extend from the plurality of on-chip caches to the system interface unit, each of the signal lines for transmitting a snoop response from a corresponding one of the on-board caches to the system interface unit. The set of tags can be implemented by dual-porting the cache tags, or by providing a duplicate and dedicated set of snoop tags.
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申请公布号 |
US6061766(A) |
申请公布日期 |
2000.05.09 |
申请号 |
US19970881746 |
申请日期 |
1997.06.24 |
申请人 |
SUN MICROSYSTEMS, INC. |
发明人 |
LYNCH, WILLIAM L.;YAMAUCHI, AL |
分类号 |
G06F12/08;(IPC1-7):G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
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主权项 |
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地址 |
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