| 摘要 |
In processor with multiple execution units and at least one instruction buffer the dispatch of instructions to available units is prioritised for multiple paths following a conditional branch. For example, instructions in the instruction buffer relating to a predicted path following a conditional branch can be dispatched to available execution units in preference to instructions relating to any other path, the instructions relating to any other paths being dispatched to any execution units remaining available. Compared to a processor with conventional predictive branch execution, prioritised dispatch of instructions in accordance with prediction priorities enables optimisation of the use of available execution units. Prediction can be on a fixed or dynamic basis. |
