| 摘要 |
A synchronous memory device includes separate pulse generators to produce write recovery pulses locally for input to each local column selector. The local generation of the write recovery pulse eliminates a write recovery line extending from the control logic to each of the local write drivers thereby simplifying control of timing within the device. The local pulse generators provide pulses of the write recovery signal in response to the transition of a write data signal from the true to the not-true state.
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