发明名称 |
Method of reducing computer module cycle time |
摘要 |
A reduction of multichip module computer system cycle time is achieved by using a voltage regulator for power supply noise attenuation to reduce jitter. The circuit for doing this includes an active filter network circuit for use in the multichip module of a computer system which generates a quiet analog VDD coupled directly to ground by using the low impedance power supply distributions which already exist in the module. The active filter network permits taking the power supply voltage from the module and stepping it down to a voltage needed by a phased lock loop via an active filter, said active filter comprising an op-amplifier and a source follower and a large value on module capacitor for a resistor network. The capacitor and resistor network acts as a filter with a large time constant where noise appearing on VDD,MOD is completely attenuated by this high value capacitor and resistor network part of our active filter network.
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申请公布号 |
US6058488(A) |
申请公布日期 |
2000.05.02 |
申请号 |
US19980023176 |
申请日期 |
1998.02.13 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ECKHARDT, JAMES PATRICK;MUENCH, PAUL DAVID;BECKER, WIREN D.;MCNAMARA, TIMOTHY GERARD |
分类号 |
H03L1/00;H03L7/06;(IPC1-7):G06F1/04 |
主分类号 |
H03L1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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