发明名称 Process for manufacturing semiconductor integrated circuit device
摘要 In order that reaction products of low vapor pressure may be prevented from being deposited on the side wall of a predetermined pattern when this pattern is to be formed by dry-etching a Pt film or a PZT film, a resist mask 54 having a rounded outer periphery at its head is used when the Pt film 53 deposited on a semiconductor substrate 50 is to be dry-etched. After this dry-etching, moreover, an overetching of a proper extent is performed to completely remove the side wall deposited film 55 which is left on the side of the pattern. The resist mask 54 is formed by exposing and developing a benzophenone novolak resist and subsequently by heating to set it while irradiating it, if necessary, with ultraviolet rays.
申请公布号 US6057081(A) 申请公布日期 2000.05.02
申请号 US19970935033 申请日期 1997.09.22
申请人 HITACHI, LTD. 发明人 YUNOGAMI, TAKASHI;SASABE, SHUNJI;SUKO, KAZUYUKI;ABE, JUN;KUMIHASHI, TAKAO;MURAI, FUMIO
分类号 G03F7/26;G03F7/40;H01L21/02;H01L21/027;H01L21/302;H01L21/3065;H01L21/311;H01L21/3213;H01L21/822;H01L21/8242;H01L27/04;H01L27/10;H01L27/108;(IPC1-7):G03F7/26 主分类号 G03F7/26
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