| 摘要 |
A user-defined logic device, such as a field programmable gate array (FPGA), having a dedicated internal bus, a plurality of dedicated bus interface circuits, and a programmable logic array. The dedicated bus interface circuits are connected in parallel to the dedicated internal bus. The programmable logic array is programmable to implement one or more functions. The programmable logic array is coupled to the dedicated bus interface circuits, such that each function is coupled to a corresponding bus interface circuit. The functions can communicate with one another through the bus interface circuits and internal bus, or through communication pathways located within the programmable logic array. In addition, the functions can communicate with devices external to the user-defined logic device through a bus bridge circuit which is coupled to the dedicated internal bus, or directly through the pins of the user-defined logic device.
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