Timing generator for plural reference clock frequencies

摘要

A timing generator generates the same timing signals even when the frequency of a reference clock is changed. The timing generator includes a data memory for storing the timing data formed of quotient data and fractional data, a counter for counting the number of reference clock pulses and producing a delay time expressed by the quotient data, an accumulator for accumulating the fractional data and generating a carry signal when the accumulated value exceeds the reference clock period where the carry signal is provided to a cycle delay circuit for delaying an output of the counter by one cycle, a number converter for converting the timing data based on a ratio of first and second reference clocks, and a complementary number for compensating a time difference between the first and second reference clock periods.