发明名称 ERASING CIRCUIT AND METHOD OF NONVOLATILE SEMICONDUCTOR MEMORY
摘要 PURPOSE: A circuit and a method for erasing a nonvolatile semiconductor memory is provided to stabilize a dense distribution of erase threshold voltages of memory cells to a normal state within a short time, and to minimize a current consumption flowing through channels of memory cells during a self convergence operation of the erase threshold voltages of the memory cells, and to minimize tunnel oxides of the memory cells during the self convergence operation of the erase threshold voltages of the memory cells. CONSTITUTION: The method performs a self convergence of a threshold voltage of a memory cell within a fixed voltage range after erasing a number of memory cells each including a source(46), a channel(44) and a drain region(48) formed on a semiconductor substrate(40) and a floating gate(56) formed on the channel region and a control gate(60) formed on the floating gate. The method includes the steps of: applying the first voltage to the control gate of the memory cells and applying the second voltage between the source region and the drain region; and generating hot carriers in the channel region by applying a back bias voltage to the semiconductor substrate and injecting one of the hot carriers into the floating gate.
申请公布号 KR100251226(B1) 申请公布日期 2000.05.01
申请号 KR19970066554 申请日期 1997.12.06
申请人 SAMSUNG ELECTRONICS CO.,LTD. 发明人 CHOI, JUNG-HYUK
分类号 G11C16/02;G11C5/14;G11C16/16;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/02 主分类号 G11C16/02
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